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1785-L40B

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Four configurable control-network channels and a 48 K-word project space position 1785-L40B for larger PLC-5 systems with revision-sensitive EEPROM maintenance.
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Technical specifications for 1785-L40B

  • Manufacturer:
    Allen-Bradley
  • Part Number:
    1785-L40B
  • Product Family:
    PLC-5
  • Product Type:
    PLC-5/40 Enhanced Programmable Controller
  • Stock:
    1
  • Controller family:
    PLC-5/40 Enhanced Programmable Controller
  • Maximum user memory:
    48 K words
  • Total I/O maximum:
    2,048 any mix or 2,048 inputs + 2,048 outputs complementary
  • Communication ports:
    4 DH+/Remote I/O channels and 1 configurable serial port
  • Maximum rack addresses:
    16 rack addresses (0…17 octal)
  • Maximum I/O chassis:
    61 total; 60 remote
  • Backplane current:
    3.3 A at 5 V DC
  • Operating temperature:
    0…60 °C
  • Storage temperature:
    -40…85 °C
  • Relative humidity:
    5…95%, noncondensing
  • Vibration:
    2 g at 10…500 Hz
  • Operating shock:
    30 g
  • Non-operating shock:
    50 g
  • Enclosure type:
    Open style
  • Battery:
    1770-XYC
  • Chassis location:
    Left-most slot in supported 1771 chassis
  • Model-specific boundary:
    32 K-word limit per data-table file; Series A Revision B needs a zero Global Status Flag before an EEPROM write
  • Weight:
    1.42 kg
  • Tariff Code:
    8537101190
  • Country of origin:
    USA
  • Place of shipment:
    Xiamen,Fujian,China
By purchasing this item, you agree to the Terms & Conditions, ApterPower is not an authorized distributor for listed manufacturers or tradenames and therefore the manufacturer's warranty does not apply. All our products come with ApterPower's 1-year warranty.

More Information

Overview Manuals Four-Link Ownership 48 K File Design EEPROM Write Gate Product Applications

Features:

  • Four network channels: independent DH+ or Remote I/O assignments support larger 1771 systems
  • PLC-5/40 scale: 48 K-word memory and a 2,048-I/O any-mix ceiling
  • EEPROM safeguard: a Series A Revision B Global Status Flag condition protects memory during writes
1785-L40B provides four configurable control-network channels for systems that must divide remote racks or DH+ duties across several links.

Its 48 K total memory does not remove the separate 32 K-word ceiling on an individual data-table file, so project structure matters during expansion.

Replacement acceptance should join Series/Revision, scan lists, rack ownership, file sizes, battery condition, and the EEPROM procedure into one controlled record.
Apter Power can review 1785-L40B Series/Revision and project documentation before coordinating quotation and procurement.
Allen-Bradley 1785-L40B PLC-5/40 Enhanced Programmable Controller Manuals, Datasheets, Links
Important Notice: Other accessories, manuals, cables, calibration data, software, etc. are not included with this equipment unless listed in the above stock item description. All prices are shown in USD.
  • Rack partition: assign every octal rack to one of the four channels and reject duplicate scan-list ownership.
  • Mode separation: label each port as DH+, scanner, or adapter before reconnecting legacy blue-hose cabling.
  • Load balance: prove each link’s device count, rate, termination, and response independently before system-wide run.
  • Total memory: keep the application within the 48 K-word controller capacity.
  • Data-table ceiling: preserve the 32 K-word maximum for an individual data-table file when reorganizing or converting data.
  • Change control: compare offline file sizes and addresses with the validated production archive before download.
  • Series check: identify whether the processor is Series A Revision B before a memory-module write.
  • Status flag: set the Global Status Flag file to zero for that affected hardware.
  • Safe procedure: hold the process safe, use Program or Remote Program mode, confirm the jumper and module capacity, then verify the stored image.
  • Large 1771 Remote I/O control: distribute supported rack addresses across as many as four scanner links.
  • DH+ peer and programming networks: allocate one or more configurable channels to documented DH+ duties.
  • Battery-backed PLC-5/40 application storage: operate and maintain a 48 K-word controller with compatible EEPROM backup.
Description
Four independently configured network channels give 1785-L40B its system role in larger 1771 installations. Each path can be assigned to DH+ or Remote I/O work, while the separate serial interface supports the documented ASCII or DF1 arrangements without consuming one of those four control-network channels.

A project for 1785-L40B can use 48 K words of memory and control 2,048 I/O in any mix, or 2,048 inputs with 2,048 outputs in complementary mode. Sixteen octal rack addresses can cover sixty-one total chassis, while an individual data-table file remains limited to 32 K words.

Revision evidence has direct maintenance value for 1785-L40B because Rockwell Automation documents a Series A Revision B condition for memory-module writes. The processor identity, channel map, approved project, battery history, and compatible EEPROM should therefore remain one controlled recovery record even when the operating application appears unchanged.
Revisions

Revision Part #

Also known as

1785-L40B Series B
1785-L40B Series B, Revision S.2
1785-L40B Series C
1785-L40B Series C, Revision U.2
1785-L40B Series D
1785-L40B Series D, Revision L.2
1785-L40B Series E
1785-L40B Series E, Revision K.2
Alternative Names
Allen-Bradley 1785-L40B Rockwell Automation 1785-L40B AB 1785-L40B 1785L40B 1785 L40B PLC-5/40 Enhanced Programmable Controller 1785-L40B
Technical notes
Before writing an EEPROM on a Series A Revision B 1785-L40B, set the Global Status Flag file to zero exactly as Rockwell Automation specifies. Confirm the processor Series/Revision, preserve a verified project backup, and do not begin the write while the flag remains nonzero, because the documented procedure warns of memory loss and a processor fault.
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FAQS

The following is a list of questions commonly asked by our customers. Please contact us if you have a question about our process that is not answered below.
Why must the Global Status Flag be checked before an EEPROM write on some 1785-L40B processors?
Identify whether the unit is Series A Revision B, set the Global Status Flag file to zero, verify the approved project and memory module, place the processor in the required program mode, and stop if the flag cannot be confirmed.
How should intermittent rack faults be traced across four channels on 1785-L40B?
Build a rack-to-channel matrix, correlate each fault with the channel indicator and scan list, verify rate, termination, device count, and cable length on the affected link, and avoid changing the other three healthy channels.
Why can free total memory on 1785-L40B coexist with a data-table allocation error?
Inspect the affected file size and type, keep every data-table file within 32 K words, review indirect addresses and conversion changes, and reorganize only in an offline tested copy.
What should be checked before using all sixty remote chassis available to 1785-L40B?
Validate the sixteen octal rack addresses, four scan lists, per-link physical-device and rack limits, rate-dependent length, terminators, scan-time budget, and fault response with staged groups before full operation.
Can a 32-point 1771 module be inserted anywhere in a chassis led by 1785-L40B?
No. Confirm whether the chassis uses 2-slot, 1-slot, or 1/2-slot addressing; apply the documented pairing rule for 32-point modules, compare the project image table, and verify keying before insertion.
What evidence is required when a seller labels a processor 1785-L40B/E?
Treat /E as a revision notation, not part of the core Product Model; require full nameplate and Series/Revision images, four-channel face, memory and battery records, project checksum, condition, quantity, and destination before correcting the page or releasing shipment.