Features:
- A six-entry firing mask controls six fiber-optic outputs for the individual bridge legs.
- Three fiber-optic status inputs combine leg-cell and power-supply returns into a 16-bit status word.
- VCO, Sigma-Delta, zero-crossing, heartbeat, and hardware-overcurrent circuits return timed bridge feedback and protection status to the VME host.
The 16-bit system clock timestamps three zero-crossing latches and the accumulated analog-feedback values before the host reads them over VME.
P2 assigns the board address automatically when the board changes rack position, but the front-panel OC_SP level still requires manual adjustment for the connected source-side CT or load-side LEM scaling.
Host-commanded loopback and analog-signal injection support board selftests, while IMOK and OC FLT provide separate visual indications for heartbeat operation and latched overcurrent.
The General Electric DS200FCGDH1A Gate Distribution and Status Board may still be available for purchase and support from Apter Power beyond End-Of-Life (EOL) by the manufacturer (OEM).
General Electric DS200FCGDH1A Gate Distribution and Status Board Manuals,Datasheets,Link
Important Notice: Other accessories, manuals, cables, calibration data, software, etc. are not included with this equipment unless listed in the above stock item description. All prices are shown in USD.
Following commands through the optical paths
- Firing mask: Six register entries correspond to the six cell strings in the bridge.
- Transmitters: LEG1 through LEG6 can send as many as six simultaneous fiber-optic firing signals.
- Status receivers: STAT1, STAT2, and STAT3 accept multiplexed returns from three FGPA boards.
- Status word: Two sets of leg-cell states and the power-supply states are stored as one 16-bit value.
Separating bridge measurement channels
- Voltage path: A 20-pin NATO cable supplies scaled DC and three phase-voltage signals within a ±10 V electronics range.
- Current path: Source-side CTs or load-side LEM modules supply IA and IC, with IB derived by the conditioning circuits.
- Frequency conversion: Eight VCO inputs accumulate in separate 16-bit counters before a host read command transfers the values.
- Parallel conversion: Six Sigma-Delta channels digitize voltage and current signals alongside the VCO paths.
Tracing inhibited or latched gating
- CTLN1 loop: Absence of the 24 V DC hardware loop blocks cell gating independently of the host CPU.
- Heartbeat: An interval beyond approximately 8 ms turns off IMOK and gating until a hard reset.
- Overcurrent: IFB above the front-panel OC_SP level for approximately 26 ms latches the hardware overcurrent signal.
- Commutation check: Leg current outside the firing interval and overlap window increments a counter for the affected bridge leg.
Confirming rack assignment and board state
- P1 interface: The 96-pin connector carries the A24/D16 VME bus.
- P2 assignment: Backplane pins set the VME address automatically and carry inter-board I/O signals.
- Front indicators: IMOK green reports an active heartbeat; OC FLT red reports latched overcurrent protection.
- Selftest: Host commands exercise loopback functions and inject test signals into analog paths.