Features:
- Executes one channel of the three-processor Tri-GP architecture.
- Uses a dedicated I/O processor for the 2 Mbit/s field-data path.
- Provides flash, DRAM, shared memory and monitored NVRAM resources.
This ordering code identifies the Tri-GP v2 main processor fitted to the 2101S2 processor baseplate.
Three processors run the project in parallel and use TriBus communication to maintain channel agreement.
Firmware, application checksum, baseplate wiring and all network settings must be controlled during replacement.
Availability is subject to Apter Power inventory and sourcing confirmation.
Verified resources for Triconex 3101S2:
Important Notice: Other accessories, manuals, cables, calibration data, software, etc. are not included with this equipment unless listed in the above stock item description. All prices are shown in USD.
- Executes process-control and safety logic in a Tri-GP v2 controller.
- Coordinates triplicated I/O data and controller diagnostics across the three channels.
- Restores one processor channel while the approved online-maintenance procedure is followed.
- The control application is stored in flash and executed from local processor memory.
- TriStation 1131 manages the controller project, downloads and online maintenance functions.
- Project checksum and retentive-variable behavior must match the validated system baseline.
- TriBus and diagnostic buses allow the three processors to compare channel operation.
- Battery, power, communication and alarm states are exposed through front indicators and system diagnostics.
- A fault in one channel is isolated so the remaining processors can continue the configured control function.
- Processor firmware must be approved for the installed Tri-GP v2 hardware and TriStation project.
- Firmware changes are controlled maintenance events and require a saved application and rollback plan.
- All three processor channels should be checked for the intended revision after service.