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6ES5948-3UR23

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Built for the SIMATIC S5-155H central controller, Siemens 6ES5948-3UR23 is a CPU 948R that executes STEP 5 programs and coordinates the rack I/O process image.
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Technical specifications for 6ES5948-3UR23

  • Manufacturer:
    Siemens
  • Part Number:
    6ES5948-3UR23
  • Product Family:
    Siemens Simatic S5
  • Product Type:
    Central Processing Unit
  • Stock:
    1
  • Controller System:
    S5-155H
  • CPU Designation:
    CPU 948R
  • Internal RAM:
    1600 KB
  • Programming System:
    STEP 5
  • Programming Languages:
    LAD, CSF, STL and SCL
  • Program Processing:
    Cyclic, time-controlled and interrupt-driven
  • Programmer Port:
    SI1, 9600 bit/s
  • Operating Temperature:
    0 to 55 degrees C
  • Degree of Protection:
    IP00
  • Process-Image Inputs:
    1024 maximum
  • Process-Image Outputs:
    1024 maximum
  • Timers:
    256
  • Counters:
    256
  • Weight:
    1.021 lbs (0.463 kg)
  • Estimated shipping dimensions:
    26.6x21.3x3.3cm
  • Tariff Code:
    85371091
  • Country of origin:
    Germany
  • Place of shipment:
    Xiamen,Fujian,China
By purchasing this item, you agree to the Terms & Conditions, ApterPower is not an authorized distributor for listed manufacturers or tradenames and therefore the manufacturer's warranty does not apply. All our products come with ApterPower's 1-year warranty.

More Information

Overview Manuals Program Flow Front Controls Interface Paths Fault States

Features:

  • The CPU 948R processes STEP 5 programs inside an S5-155H central controller.
  • Internal RAM and a removable flash EPROM memory card separate execution memory from retained load storage.
  • Dedicated front LEDs distinguish run state, reset activity, interface faults and output disablement.
The module places its processor and RAM on two mechanically joined Eurocard boards that operate as one CPU assembly.

A front mode selector and reset switch control run, stop, overall reset and cold-restart sequences.

The serial programmer port stays available at the front while rack signals pass through the backplane connectors.

The Siemens 6ES5948-3UR23 SIMATIC S5 CPU 948R Central Processing Unit may still be available for purchase and support from Apter Power beyond End-Of-Life (EOL) by the manufacturer (OEM).
Siemens 6ES5948-3UR23 SIMATIC S5 CPU 948R Central Processing Unit Manuals,Datasheets,Link Important Notice: Other accessories, manuals, cables, calibration data, software, etc. are not included with this equipment unless listed in the above stock item description. All prices are shown in USD.

How the CPU schedules STEP 5 work

  • Cyclic Level: The normal scan repeatedly executes the assigned organization and program blocks.
  • Timed Level: Time-grid and clock-controlled events start their configured processing independently of the base scan.
  • Interrupt Level: Process interrupts arrive through the S5 bus and branch to their assigned block boundary handling.
  • Soft Stop: The CPU can continue the designated stop-mode processing while normal digital outputs remain disabled.

Operating the CPU from the front plate

  • Mode Selector: RUN and STOP positions define whether the user program scans or enters a soft stop.
  • Reset Switch: Switch position selects overall reset, cold restart or cold restart with retained memory.
  • Memory Receptacle: The front slot accepts the S5 flash EPROM used to restore the load image.
  • Mechanical Lock: The lever and locking bolt secure the joined CPU boards in the prescribed central-rack slot.

Engineering and rack connections

  • SI1 Port: A programmer can connect at the front regardless of the current CPU operating mode.
  • SI2 Indication: The interface LED remains off in normal operation and reports an internal communication fault when lit.
  • Rack Backplane: The central controller supplies the CPU and carries module access for the process image.
  • SINEC H1 Option: A compatible communication processor can move engineering traffic over the parallel backplane path.

Interpreting the diagnostic indications

  • QVZ: A timeout indicates that an addressed module, memory path or expansion connection no longer acknowledges.
  • ADF: The program attempted to use an address absent from the configured process image.
  • ZYK: Scan-time monitoring stopped cyclic processing after the watchdog limit was exceeded.
  • BASP: Command output disablement forces digital outputs to the safe zero state.
Description
For the SIMATIC S5-155H central controller, Siemens 6ES5948-3UR23 is the CPU 948R central processing unit that executes STEP 5 control programs and maintains the process image for the rack I/O.

User program and data reside in internal RAM during operation. A SIMATIC S5 flash EPROM memory card can retain the load image, which is copied into the CPU memory during an overall reset.

The processor supports cyclic, timed and interrupt-driven execution. SI1 provides the front programmer connection, while the controller backplane carries rack communication and the process-image exchange.

RUN, STOP and SYS FAULT indications show the controller state, and the QVZ, ADF, ZYK and BASP LEDs separate timeout, addressing, cycle-monitoring and output-disable conditions. A soft stop can retain diagnostic activity, whereas a hard stop requires the controller power cycle specified for the fault state.
Alternative Names
6ES59483UR23 6ES5 948-3UR23 6ES5 948 3UR23 Siemens 6ES5948-3UR23 CPU 948R UR23 SIMATIC S5-155H 6ES5948-3UR23 6ES5948-3UR23 Central Processing Unit 6ES594B-3UR23
Technical notes
Siemens 6ES5948-3UR23 provides CPU 948R processing with 1600 KB RAM for an S5-155H controller. Its front controls support RUN, STOP and reset operations with dedicated fault indication.
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FAQS

The following is a list of questions commonly asked by our customers. Please contact us if you have a question about our process that is not answered below.
Before an overall reset of 6ES5948-3UR23, which program resources must be preserved?
Confirm that the correct S5 flash EPROM and STEP 5 program for 6ES5948-3UR23 are available, because an overall reset reinitializes RAM and reloads the stored image.
Why might 6ES5948-3UR23 show BASP while the CPU is not executing outputs?
BASP on 6ES5948-3UR23 means command output is disabled, so digital outputs are forced to the safe zero state while the stop or fault condition is resolved.
How does a soft STOP differ from a hard STOP on 6ES5948-3UR23?
In soft STOP, 6ES5948-3UR23 can run the designated stop-mode block with outputs disabled; a hard STOP halts processing and requires a power cycle.
Which front connection should be used for STEP 5 engineering on 6ES5948-3UR23?
Use the SI1 programmer port on 6ES5948-3UR23 for the serial engineering connection, including access while the CPU is stopped.
When QVZ lights on 6ES5948-3UR23, which fault boundary should be investigated?
QVZ on 6ES5948-3UR23 points to a timeout involving an addressed module, expansion path, load enable or user-memory access.
Must the two circuit boards of 6ES5948-3UR23 stay together during replacement?
The processor electronics and RAM of 6ES5948-3UR23 are built on two bolted Eurocard boards that form one inseparable CPU assembly.

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