Features:
- Uses separate drive, motor and co-motor processor sections.
- Keeps processor firmware and adjustable drive parameters in distinct memory devices.
- Reports coded faults through eight LEDs with range-specific blink patterns.
Three cooperating processors give
DS200SDCCG5A a divided workload. Drive coordination, motor regulation and co-motor calculation run in their assigned sections, while dual-ported RAM passes operating data between them.
Program code and adjustable setup data occupy different devices on
DS200SDCCG5A. The processor PROM set carries operating firmware, whereas EEPROM U9 retains the parameter set for the configured drive.
Eight indicators on
DS200SDCCG5A communicate more than an on/off state. Blink cadence selects the applicable code range, after which the illuminated positions are interpreted with that range's BCD or binary method.
The General Electric DS200SDCCG5A Drive Control Card may still be available for purchase and support from Apter Power beyond End-Of-Life (EOL) by the manufacturer (OEM).
General Electric DS200SDCCG5A Drive Control Card Manuals,Datasheets,Link
Important Notice: Other accessories, manuals, cables, calibration data, software, etc. are not included with this equipment unless listed in the above stock item description. All prices are shown in USD.
Distributed Control Sections
- DCP: The drive-control processor executes the main control and interface tasks.
- MCP: The motor-control processor handles motor-specific calculations and regulation.
- CMP: The co-motor processor supports dedicated mathematical processing.
- Shared RAM: Dual-ported memory permits data exchange between processor sections.
Firmware and Parameter Storage
- Processor PROMs: U11, U12, U22 and U23 carry assigned operating firmware.
- EEPROM: U9 stores configurable drive parameters separately from firmware.
- Device Matching: Installed memory sets must correspond to the intended drive configuration.
- Tool Access: Approved configuration software is required for software or parameter changes.
LED Code Interpretation
- Eight Indicators: The display reports coded board and drive faults.
- Lower Codes: Faults 1-399 use the documented slow-blink BCD pattern.
- Higher Codes: Faults 400-1023 use a faster binary pattern.
- Reading Order: LED position and blink rate must be evaluated before assigning a fault number.
Controlled Restart Inputs
- Local Reset: The board pushbutton initiates a hardware reset.
- Customer Input: A documented external DC signal can request reset through the interface path.
- Software Reset: Programmed logic may generate an internal reset.
- Watchdog Action: Automatic hardware protection can reset the processor when supervision fails.